July 2019 - Senior ASIC Research Engineer

Publication Date: 01/07/2019

Closing Date: 01/10/2019

Job Reference: IFAE-2019-07

The Institut de Física d'Altes Energies (IFAE, see www.ifae.es), a research Centre currently awarded with the Severo Ochoa recognition for excellence, is opening a new position for a highly qualified professional for the design and production of dedicated ASICs for a wireless retinal implant.

The Applied Physics division at IFAE has developed several ASICs related to pixel radiation sensors for medical and industrial applications, as well as for fundamental physics. The group has recently embarked on the development of an ASIC for a retinal implant. To achieve this aim we are looking for an experienced ASIC Research Engineer to enforce our current microelectronics design team. The successful candidate is expected to lead the efforts in the design, production, and characterization of the aforementioned ASIC.

Tasks/Responsibilities:
Design of custom Analog/Mixed-Signal ASICs for medical implants, including system conceptual design, architecture evaluation, circuit implementation, simulation (At the IP and top SOC levels), layout and extraction, and verification. Creation of novel circuit designs and architectures. Elaboration of periodical technical documentation and reports related to the ASIC. Experimental characterization of the ASICs. Publication of results in peer-reviewed journals.

Requirements:
Ph.D/Master's degree in Electrical Engineering. Minimum of 5 years experience in the design and development of analog/mixed-signal IC design. The experience should include operational and shaping amplifiers, comparators, bandgap circuits, LDOs and/or reference circuits. Should have work experience with Cadence IC design package, and be familiar with Analog/Mixed signal simulation tools (Monte Carlo, ams,...). Have experience in the latest CMOS technologies like TSMC processes

Desirable:
Experience in: RF integrated circuits such as Low Noise Amplifiers, Oscillators, Power Amplifiers, and PLL circuits; signal conversion circuits such as ADCs and DACs; clock distribution systems. Deep sub-micron CMOS processes like 65 nm is highly desirable. Knowledge of signal processing and/or communications systems. Ability to mentor and train junior engineers. Enthusiasm for publishing/patenting work and for assisting with sponsor engagement.

Other:
IFAE wishes to fill this post as soon as possible. Applications should be submitted to This email address is being protected from spambots. You need JavaScript enabled to view it. no later than October 1st, 2019, but will be accepted until the post is filled. Applications should include a cover letter describing the applicant's qualifications for the position, a CV and publication list, and a list of three references from whom letters may be solicited.

Salary will be commensurate with experience and qualifications. The initial contract will be for 3 years. Extensions and/or indefinite employment will be subjected to mutual satisfaction.

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